building for digital abundance

Resources and Software

We offer a variety of resources and software to support your research and development needs. We also encourage inspecting our BSD 3-Clause and APL 2.0 compatible licenses.

Open Source Software

Vecmat

A simple-to-use, yet robust math and linear algebra library in C for 2d/3d graphics, machine learning, physics, and science — check GitHub and the latest docs.

CPU Feature Support

  • AVX supported
  • AVX2 (FMA3) supported
  • AVX-512F (AVX-512 FMA) supported
  • AVX10 (FMA3) work in progress
  • AVX10.1 (Xeon 6) coming in 2027
  • AVX10.2 (Xeon 7) tbd
  • SVE (ARMv8.2-A+) supported
  • SVE2 (ARMv9) supported
  • NEON/ASIMD (ARMv7-ARMv9) supported

MMA Support

  • WMMA / MMA (NVIDIA/CUDA) work in progress
  • MFMA / WMMA (AMD/ROCm) work in progress
  • AMX (4th–7th generation Intel Xeon) coming in 2027
  • SME / SME2 (ARMv9.2-A+) tbd

Microserve

A stand-alone HTTP server for experimentation and development — check GitHub and the latest docs.

Protocol Support

Sites and Listeners

  • Stand-alone first. Multi-site YAML is opt-in: several server_name blocks, per-site TLS, locations (root / proxy_pass), named backends, index files, and access logs.
  • CLI listen overlay: --listen, --address, and --proto ignore YAML servers and start a single site.
  • Dual-stack: --ipv6 / --no-ipv4 expand unspecified binds; explicit addresses stay as written.
  • Process isolation: one child process per site when two or more sites are resolved. A single site still runs in-process.

Proxy, Auth, and Federation

  • Reverse proxy: nginx-style proxy_pass to a host or named backend (backend://api/). Hop-by-hop headers are stripped; failures return 502 or 504.
  • H2C origins: an h2c-only socket keeps HTTP/1.1 closed unless configured. The proxy can speak HTTP/2 prior-knowledge (h2c://).
  • HTTP Basic Authorization per location, with {SHA512} .htpasswd (RFC 7617).
  • Optional federation (-f federation.yaml): hub or member, certified or unverified membership, and certs that can be revoked. Stand-alone remains the default.
  • Logging and timeouts: per-site error logs, YAML access_log, and connect, read, and write timeouts.

Library and Tests

  • C++20 modules. Dependencies are Boost.Asio/Beast, nlohmann_json, nghttp2, ngtcp2/nghttp3, and OpenSSL.
  • Built-in YAML parser for config — no extra YAML library. The Boost dependency is probably temporary.
  • Over 100 test cases and 700 assertions, on Catch2.
  • Also shipped as a static library, so it can be embedded in other applications.

Open Source Licenses

Meanwhile, you can check out our open source licenses that will tackle in the future this probably exactly:


Vectorized Type Reference by Vendor

Intel (CPU)

Generation AVX Supported Types AMX Supported Types
4th Gen Xeon AVX, AVX2, AVX-512 AMX-TILE, AMX-BF16, AMX-INT8
5th Gen Xeon AVX, AVX2, AVX-512 AMX-TILE, AMX-BF16, AMX-INT8
Xeon 6 AVX, AVX2, AVX-512, AVX10.1 AMX-TILE, AMX-BF16, AMX-INT8, AMX-FP16
Xeon 7 AVX, AVX2, AVX-512, AVX10.1, AVX10.2 AMX-TILE, AMX-BF16, AMX-INT8, AMX-FP16, AMX-FP8, AMX-TF32, AMX-AVX512

AMD (CPU)

Generation Architecture Supported Vector Extensions
2nd/3rd Gen EPYC
(Rome/Milan)
Zen 2 / Zen 3 AVX, AVX2
4th Gen EPYC
(Genoa/Bergamo)
Zen 4 / Zen 4c AVX, AVX2, AVX-512
(256-bit data path)
5th Gen EPYC
(Turin)
Zen 5 / Zen 5c AVX, AVX2, AVX-512
(native 512-bit data path)

ARM (CPU)

Generation / Extension SVE Support Supported Types
ARMv8.2-A+ SVE (optional) Z0–Z31 (128–2048-bit);
P0–P15; INT8, INT16, INT32, INT64, FP16, FP32, FP64
ARMv9-A SVE2 (baseline) Z0–Z31 (128–2048-bit);
P0–P15; INT8, INT16, INT32, INT64, FP16, FP32, FP64
ARMv9.2+ SVE2 + SME/SME2 (optional) Z0–Z31, P0–P15, ZA tiles;
INT8, INT16, INT32, INT64, BF16, FP16, FP32, FP64

NVIDIA (GPU)

Generation Tensor Core Gen / API Supported Types (A/B → Acc)
Ampere (SM 8.0)
(A100)
3rd Gen
WMMA + mma.sync
FP16 → FP16 / FP32
BF16, TF32 → FP32
FP64 → FP64
INT8, INT4 → INT32
Ada Lovelace (SM 8.9)
(L40/L40S/L4)
4th Gen
WMMA + mma.sync
FP16 → FP16 / FP32
BF16, TF32 → FP32
FP64 → FP64
INT8, INT4 → INT32
FP8 → FP16 / FP32
Hopper (SM 9.0)
(H100/H200)
4th Gen
WMMA + mma + wgmma
FP16 → FP16 / FP32
BF16, TF32 → FP32
FP64 → FP64
INT8 → INT32
FP8 → FP16 / FP32
Blackwell (SM 10.x)
(B100/B200)
5th Gen
tcgen05.mma
FP16 → FP16 / FP32
BF16, TF32 → FP32
FP64 → FP64
INT8 → INT32
FP8 → FP16 / FP32
FP6, FP4, MXFP, NVFP4 → FP32

AMD (GPU)

Generation Architecture Supported Types (A/B → Acc)
MI100 series
(MI100)
CDNA1 FP32 → FP32
FP16, BF16 → FP32
INT8 → INT32
MI200 series
(MI210/MI250/MI250X)
CDNA2 FP32 → FP32
FP16, BF16 → FP32
INT8 → INT32
FP64 → FP64
MI300 series
(MI300A/X, MI325X)
CDNA3 FP32 → FP32
FP16, BF16, FP8, BF8, TF32 → FP32
INT8 → INT32
MI350 series
(MI350X/MI355X)
CDNA4 FP32 → FP32
FP16, BF16, FP8, BF8, FP6, FP4, TF32, MXFP → FP32
INT8 → INT32

Intel (GPU)

Generation Architecture / XMX Supported Types (A/B → Acc)
Alchemist
(Arc A-series A310/A380/A580, A750/A770)
Xe-HPG
XMX (DPAS)
FP16, BF16 → FP32
INT8, INT4, INT2 → INT32
Battlemage
(Arc B-series B570/B580)
Xe2-HPG
XMX (enhanced)
FP16, BF16, TF32 → FP32
INT8, INT4, INT2 → INT32